Jiquan Long
89bf226f0b
feat: support keyword text match ( #35923 )
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fix : #35922
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Signed-off-by: longjiquan <jiquan.long@zilliz.com>
2024-09-10 15:11:08 +08:00
Jiquan Long
91df03afe8
feat: put inverted index into ram ( #35222 )
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fix: https://github.com/milvus-io/milvus/issues/35224
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Signed-off-by: longjiquan <jiquan.long@zilliz.com>
2024-08-06 11:54:16 +08:00
zhenshan.cao
aa247f192d
enhance: remove unused code for StorageV2 ( #35132 )
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issue: https://github.com/milvus-io/milvus/issues/34168
Signed-off-by: zhenshan.cao <zhenshan.cao@zilliz.com>
2024-08-01 12:08:13 +08:00
smellthemoon
5616b7e8d2
enhance: support null in c data_datacodec and load null value ( #32183 )
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1. support read and write null in segcore
will store valid_data(use uint8_t type to save memory) in fieldData.
2. support load null
binlog reader read and write data into column(sealed segment),
insertRecord(growing segment). In sealed segment, store valid_data
directly. In growing segment, considering prior implementation and easy
code reading, it covert uint8_t to fbvector<bool>, which may optimize in
future.
3. retrieve valid_data.
parse valid_data in search/query.
#31728
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Signed-off-by: lixinguo <xinguo.li@zilliz.com>
Co-authored-by: lixinguo <xinguo.li@zilliz.com>
2024-07-23 16:07:51 +08:00
Buqian Zheng
8cb350598c
enhance: Improve GetVectorById of Sparse Float Vector ( #33209 )
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issue: #29419
* sparse float vector to support raw data mmap
For get vector from chunk cache, I added a unit test but marking it as
skipped due to a known issue. I have tested it locally.
Signed-off-by: Buqian Zheng <zhengbuqian@gmail.com>
2024-06-12 10:09:55 +08:00
yah01
a77693aa19
enhance: convert the GetObject util to async ( #30166 )
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This makes it much easier to use
Signed-off-by: yah01 <yang.cen@zilliz.com>
2024-01-22 19:20:57 +08:00
zhagnlu
a602171d06
enhance: Refactor runtime and expr framework ( #28166 )
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#28165
Signed-off-by: luzhang <luzhang@zilliz.com>
Co-authored-by: luzhang <luzhang@zilliz.com>
2023-12-18 12:04:42 +08:00
Bingyi Sun
36f69ea031
feat: integrate storagev2 in building index of segcore ( #28768 )
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issue: https://github.com/milvus-io/milvus/issues/28655
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Signed-off-by: sunby <sunbingyi1992@gmail.com>
2023-12-05 16:48:54 +08:00
foxspy
370b6fde58
milvus support multi index engine ( #27178 )
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Co-authored-by: longjiquan <jiquan.long@zilliz.com>
2023-09-22 09:59:26 +08:00
yihao.dai
bb6711f28c
Add ChunkCache: support get vector from storage ( #26142 )
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Signed-off-by: bigsheeper <yihao.dai@zilliz.com>
2023-09-15 10:21:20 +08:00
xige-16
1055c90456
Add default retrieve limit ( #24782 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2023-08-10 14:11:15 +08:00
yah01
227d2c8b3a
Reduce loading index memory usage ( #25698 )
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Signed-off-by: yah01 <yang.cen@zilliz.com>
2023-07-19 14:02:57 +08:00
yah01
dd5f896dc8
Load batch by batch ( #25212 )
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This will significantly reduce the memory usage while loading
- 1x memory usage and MBs overhead for buffer (memory mode)
- only MBs overhead for buffer (mmap mode)
Signed-off-by: yah01 <yang.cen@zilliz.com>
2023-07-06 13:58:27 +08:00
xige-16
04082b3de2
Migrate the ability to upload and download binlog to cpp ( #22984 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2023-06-25 14:38:44 +08:00
Enwei Jiao
967a97b9bd
Support json & array types ( #23408 )
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Signed-off-by: yah01 <yang.cen@zilliz.com>
Co-authored-by: yah01 <yang.cen@zilliz.com>
2023-04-20 11:32:31 +08:00
xige-16
9aa99aedbb
[Cherry-Pick] Remove arrow uasge in FieldData ( #22726 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2023-03-20 10:41:56 +08:00
yah01
bdd6bc7695
Re-format cpp code ( #22513 )
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Signed-off-by: yah01 <yang.cen@zilliz.com>
2023-03-02 15:55:49 +08:00
presburger
9950cacd10
support knowhere 2.0 ( #21857 )
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Signed-off-by: Yusheng.Ma <Yusheng.Ma@zilliz.com>
2023-02-10 14:24:32 +08:00
xige-16
8c9c1672ae
Assign different storage config for indexes ( #19517 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-10-14 14:45:23 +08:00
xige-16
428840178c
Support diskann index for vector field ( #19093 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-09-21 20:16:51 +08:00
xige-16
4de1bfe5bc
Add cpp data codec ( #18538 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
Co-authored-by: zhagnlu lu.zhang@zilliz.com
Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-09-09 22:12:34 +08:00
