Zhen Ye
3e788f0fbd
enhance: record memory size (uncompressed) item for index ( #38770 )
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issue: #38715
- Current milvus use a serialized index size(compressed) for estimate
resource for loading.
- Add a new field `MemSize` (before compressing) for index to estimate
resource.
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Signed-off-by: chyezh <chyezh@outlook.com>
2025-01-14 10:33:06 +08:00
smellthemoon
eb3e4583ec
enhance: all op(Null) is false in expr ( #35527 )
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#31728
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Signed-off-by: lixinguo <xinguo.li@zilliz.com>
Co-authored-by: lixinguo <xinguo.li@zilliz.com>
2024-10-17 21:14:30 +08:00
congqixia
3123093dd7
enhance: Use MARISA_LABEL_ORDER when building trie index ( #36034 )
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Related to #35941
Previous PR: #35943
This PR make `Trie` index using `MARISA_LABEL_ORDER`, which make
predictive search iterating in lexicographic order.
When trie index is build in label order, lexicographc could be utilized
accelerating `Range` operations.
However according to the official document, using `MARISA_LABEL_ORDER`
will make "exact match lookup, common prefix search, and predictive
search" slower.
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Signed-off-by: Congqi Xia <congqi.xia@zilliz.com>
2024-09-09 14:29:05 +08:00
smellthemoon
80dbe87759
enhance: support null value in index ( #35238 )
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#31728
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Signed-off-by: lixinguo <xinguo.li@zilliz.com>
Co-authored-by: lixinguo <xinguo.li@zilliz.com>
2024-08-16 15:30:54 +08:00
zhenshan.cao
aa247f192d
enhance: remove unused code for StorageV2 ( #35132 )
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issue: https://github.com/milvus-io/milvus/issues/34168
Signed-off-by: zhenshan.cao <zhenshan.cao@zilliz.com>
2024-08-01 12:08:13 +08:00
zhagnlu
03a3f50892
enhance: add skip using array index when some situation ( #33947 )
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#32900
Signed-off-by: luzhang <luzhang@zilliz.com>
Co-authored-by: luzhang <luzhang@zilliz.com>
2024-06-23 21:26:02 +08:00
zhagnlu
d43ec4db0b
enhance: support array bitmap index ( #33527 )
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#32900
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Signed-off-by: luzhang <luzhang@zilliz.com>
Co-authored-by: luzhang <luzhang@zilliz.com>
2024-06-16 21:51:58 +08:00
zhagnlu
589d4dfd82
enhance: optimize bitmap index ( #33358 )
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#32900
Signed-off-by: luzhang <luzhang@zilliz.com>
Co-authored-by: luzhang <luzhang@zilliz.com>
2024-05-30 13:09:43 +08:00
congqixia
d6429933a7
enhance: make Load process traceable in querynode & segcore ( #29858 )
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See also #29803
This PR:
- Add trace span for `LoadIndex` & `LoadFieldData` in segment loader
- Add `TraceCtx` parameter for `Index.Load` in segcore
- Add span for ReadFiles & Engine Load for Memory/Disk Vector index
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Signed-off-by: Congqi Xia <congqi.xia@zilliz.com>
2024-01-10 21:58:51 +08:00
cai.zhang
fb089cda8b
enhance: Load raw data while scalar index doesn't have raw data ( #28888 )
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issue: #28886
Signed-off-by: Cai Zhang <cai.zhang@zilliz.com>
2023-12-06 20:36:36 +08:00
Bingyi Sun
36f69ea031
feat: integrate storagev2 in building index of segcore ( #28768 )
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issue: https://github.com/milvus-io/milvus/issues/28655
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Signed-off-by: sunby <sunbingyi1992@gmail.com>
2023-12-05 16:48:54 +08:00
foxspy
370b6fde58
milvus support multi index engine ( #27178 )
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Co-authored-by: longjiquan <jiquan.long@zilliz.com>
2023-09-22 09:59:26 +08:00
Enwei Jiao
c3f15c6b95
Refactor duplicate error class into one place ( #26985 )
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Signed-off-by: Enwei Jiao <enwei.jiao@zilliz.com>
2023-09-11 20:43:17 +08:00
xige-16
04082b3de2
Migrate the ability to upload and download binlog to cpp ( #22984 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2023-06-25 14:38:44 +08:00
zhagnlu
113f9a0ebc
Support SIMD of several Expr ( #23715 ) ( #23717 )
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Signed-off-by: luzhang <luzhang@zilliz.com>
Co-authored-by: luzhang <luzhang@zilliz.com>
2023-05-12 14:11:20 +08:00
yah01
a4031da634
Refine string parameters, avoid coping or deref ( #22708 )
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Signed-off-by: yah01 <yang.cen@zilliz.com>
2023-03-13 17:53:53 +08:00
yah01
bdd6bc7695
Re-format cpp code ( #22513 )
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Signed-off-by: yah01 <yang.cen@zilliz.com>
2023-03-02 15:55:49 +08:00
xige-16
428840178c
Support diskann index for vector field ( #19093 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-09-21 20:16:51 +08:00
Jiquan Long
e88ffb8a57
Enable marisa trie ut on MacOS ( #17316 )
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Signed-off-by: longjiquan <jiquan.long@zilliz.com>
2022-06-02 10:48:03 +08:00
xige-16
56778787be
Reverse data from scalar index ( #17145 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-05-26 14:58:01 +08:00
xige-16
a8829554eb
Merge multiple sets of expr's optypes in diff dirs ( #17192 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
2022-05-24 21:56:00 +08:00
xige-16
515d0369de
Support string type in segcore ( #16546 )
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Signed-off-by: xige-16 <xi.ge@zilliz.com>
Co-authored-by: dragondriver <jiquan.long@zilliz.com>
Co-authored-by: dragondriver <jiquan.long@zilliz.com>
2022-04-29 13:35:49 +08:00
Jiquan Long
fd589baca7
Integrates marisa trie index ( #16192 )
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Signed-off-by: dragondriver <jiquan.long@zilliz.com>
2022-04-01 15:31:29 +08:00
